This invention, relates to data processing apparatus and in particular to pileline data processors.
By a pipeline data processor is meant an apparatus which comprises a plurality of processing stages which are operative in turn to execute successive phases of an instruction and in which different phases of different instructions are executable concurrently by different stages of the apparatus. Such an apparatus can have a high operating speed, since the effective rate of processing is determined by the rate at which execution of instructions can be initiated, rather than the total time required to execute an instruction. The situation is analogous to an oil pipeline, in which the rate of transfer of oil depends on the rate of pumping oil into the pipeline rather than on the time required for it to flow from one end of the pipeline to the other.
Clearly, in a pipeline processor, it is important to minimise hold-ups at any of the processing stages which might block the operation of the whole apparatus. One such hold-up might occur in the situation where one of the stages is required to write information into a specified address of a store, but the actual information to be written is not yet available, because it depends on the result of execution of a later phase of the instruction. This could result in the execution of all subsequent instructions being held up until the required information becomes available.